Bus Interface Unit, BIU, Continue........

Instruction Pointer:-

•      It is 16-bit register, which identifies the location of the next word of instruction code that is to be fetched in the current code segment.

•      IP contains an offset instead of the actual address of the next instruction.

•      The 20-bit address produced after addition of the offset stored in IP to segment base address in the CS is called the Physical address of the code byte.

The Queue:-

•      The last section of BIU is the FIFO group of registers called a queue. It is basically a group of registers.

•      This arrangement makes possible for the BIU to fetch the instruction byte while EU is decoding an instruction or executing an instruction which does not require use of buses.

•      This arrangement is called pipelining.

•      This is done to speed up the program execution.