Bus Interface Unit (BIU)

The Bus Interface unit (BIU):-

This unit handles all transfer of data and addresses on the buses for the EU(execution unit). This unit sends out addresses, fetches instructions from memory, reads data from ports and memory and writes data to ports and memory.

Different Parts of BIU:
a.Segment Register
b.Instruction Pointer
c.The Queue


1.)Segment Register:- BIU contains four 16-bit segment registers as follows:

    Code segment (CS) register
    Stack segment (SS) register
    Extra segment (ES) register
     Data segment (DS) register 



Function of Segment Register:-

Ø In 8086 complete 1MB memory is divided into 16 logical segments.
Ø Each segment thus contains 64 KB of memory.
Ø While addressing any location in the memory bank, the Physical address is calculated from two parts, the first part is Segment address, and the second is Offset.
Ø The segment registers contain 16-bit segment base addresses related to different segments.
Ø Thus the CS, DS, ES, SS segment registers, respectively contain the segment addresses for the Code, Data, Extra and Stack segments.
Ø They may or may not be physical separated.
Ø Each segment register contains a 16-bit base address that points to the lowest-addressed byte of that particular segment in memory. 





Memory Address generation:-Now i am going to tell you about how physical memory addresses is determined. For this bus interface unit has used an adder. You will understand the idea for finding the physical address with the help of example.




Generation of physical address:-

          Segment address- 1005H
          Offset address     -  5555H
          Segment address-1005H- 0001 0000 0000 0101
          Shifted by 4-bit positions-0001 0000 0000 0101 0000
                                                +
          Offset address                -           0101 0101 0101 0101
          Physical  address             -0001 0101 0101 1010 0101
                                                        1         5        5       A         5 



Instruction Pointer:-
•      It is 16-bit register, which identifies the location of the next word of instruction code that is to be fetched in the current code segment.
•      IP contains an offset instead of the actual address of the next instruction.
•      The 20-bit address produced after addition of the offset stored in IP to segment base address in the CS is called the Physical address of the code byte.



The Queue:-
•      The last section of BIU is the FIFO group of registers called a queue. It is basically a group of registers.
•      This arrangement makes possible for the BIU to fetch the instruction byte while EU is decoding an instruction or executing an instruction which does not require use of buses.
•      This arrangement is called pipelining.
•      This is done to speed up the program execution.